Method for forming fuse in semiconductor device

A method for forming a fuse in a semiconductor device, comprising the steps of:

• forming a second insulating layer on a first insulating layer, and etching the second insulating layer by using a first mask pattern to form a trench for a first metal wiring;
• depositing a first metal layer on the second insulating layer and the trench for the first metal wiring, and performing a chemical-mechanical polishing process on the first metal layer to form the first metal wiring in a region intended to be used as a fuse;
• forming a third insulating layer on the first metal wiring and the second insulating layer, and etching the third insulating layer by using a second mask pattern to form a trench for a second metal wiring in a region intended to be connected with a lower layer by means of a contact;
• depositing a barrier layer and a second metal layer on the third insulating layer and the trench for the second metal wiring, and performing a CMP process on the barrier layer and the third insulating layer to form the second metal wiring in a region intended to be connected with a lower layer by means of a contact;
• depositing a buffer layer on the second metal wiring and the third insulating layer, the buffer layer being intended to act as an etch buffer layer at the time of an etching in order to open a fuse box;
• and
• forming a passivation layer on the buffer layer, and etching the passivation layer to a desired thickness by using a third mask pattern.