Semiconductor device and method for forming the same
OwnerGa Won Leeinventor
Life of this patent
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Abstract
The present invention discloses a capacitor of a semiconductor device and a method for forming the same which has sufficient capacitance for high integration of the semiconductor device. A stack structure of a first capacitor and a second capacitor is formed to be connected to a semiconductor substrate. Here, the first and second capacitors are vertically spaced apart and electrically insulated from each other, and the adjacent capacitors are formed on different layers. Accordingly, sufficient capacitance for high integration of the semiconductor device is obtained to improve reliability of the semiconductor device and achieve high integration thereof.
Claims8
A semiconductor device having a folded bit line structure in which a first capacitor and a second capacitor are connected to one active region, wherein the first capacitor and the second capacitor are respectively formed at a different altitude, being electrically isolated from each other.
A semiconductor device, comprising:
- a 5F by 1F rectangular active region;
- two word lines of 1F, running across one active region;
- and
- two capacitors at a different altitude connected to one active region formed the two capacitors being electrically isolated from each other, wherein the two capacitors have a size of 5F2 respectively and overlap by a predetermined size.
A semiconductor device, comprising:
- a 5F by 1F rectangular active region;
- two word lines of 1F, running across one active region;
- and
- two 2F by 6F capacitors connected to one active region, wherein the two capacitors are formed at a different altitude and electrically isolated and overlap by a predetermined width.
A method for forming semiconductor device, comprising the steps of:
- forming a device isolation oxide film defining active regions on a semiconductor substrate;
- forming a first interlayer insulating film on the entire surface of the resulting structure;
- selectively patterning the first interlayer insulating film to form a first and a second contact plugs contact to the active region;
- forming a third contact plug contacting the second contact plug;
- forming a first insulating spacer on the sidewalls of the third contact plug, whereby a first contact hole exposing the first contact plug is generated;
- forming a first capacitor having a storage node, a dielectric film and a plate electrode in the first contact hole;
- forming a fourth contact plug connected to the plate electrode of the first capacitor on the resultant structure;
- forming a second insulating spacer on the sidewalls of the fourth contact plug so that the second insulating spacer covers the exposed surface of the first capacitor, whereby a second contact hole exposing the third contact plug is generated;
- and
- forming a second capacitor in the second contact hole.
Dependencies are inferred from the claim text.