Method for fabricating semiconductor device

Abstract

The present invention to provide a method for fabricating a semiconductor device capable of obtaining a proper process margin resulted from simultaneous formations of via holes in a multi-layered structure having depth differences without an additional process. To achieve this effect, the present invention includes the steps of: forming a first conductive layer; forming a first etching protection layer on the first conductive layer; forming a first insulating layer; forming a second conductive layer on the first insulating layer; forming a second etching protection layer on the second conductive layer, wherein etching protection efficiency of the second protection layer is higher than the first etching protection layer; forming a second insulating layer; and forming a first and a second via hole respectively exposing the first and the second conductive layer by selectively etching the first and the second insulating layer.

Dependencies are inferred from the claim text.