Dual damascene interconnect
AssigneeMicron Technology, Inc.
InventorsJigish D. Trivedi, Mike P. Violette
Life of this patent
Estimating the term…
Loading patent…
AssigneeMicron Technology, Inc.
InventorsJigish D. Trivedi, Mike P. Violette
Estimating the term…
A dual damascene process is disclosed, in which a contact via and trench pattern is etched into insulating layer(s). The via is first partially filled by selective metal (e.g., tungsten) deposition, thereby forming a partial plug that raises the floor and reduces the effective aspect ratio of the trench and via structure. The remaining portion of the contact via is then filled with a more conductive material (e.g., aluminum). This deposition also at least partially fills the overlying trench to form metal runners. In the illustrated embodiment, hot aluminum deposition fills the portion of the contact via left unoccupied by the selective deposition and overfills into the trench. A further, cold aluminum deposition then follows, topping off the trench prior to planarization. The dual damascene structure thus exhibits a raised floor relative to conventional dual damascene metallization, while still retaining the conduction benefits of aluminum through a significant portion of the contact and the metal runner formed in the trench.
An interconnect in a contact via and an overlying trench formed in insulating material of an integrated circuit, the contact via partially filled with tungsten having a greater thickness over a bottom surface of the contact via than over any surface of the trench, a second metal having greater conductivity than tungsten filling both a remainder of the contact via over the tungsten and at least part of the trench.
An integrated circuit, comprising:
A system comprising a contact plug of a dual damascene structure, the contact plug having a contact height between a lower surface and an upper surface and comprising a tungsten layer having a top surface of the tungsten layer at between about one-third and two-thirds of the contact height over the lower surface, and an aluminum layer extending from the the top surface of the tungsten layer to the upper surface.
An integral metallization structure in an integrated circuit, the structure comprising a metal runner comprising a first metal layer, the first metal layer extending into an upper portion of an underlying contact via, the contact via further comprising a lower portion formed of a second metal layer extending from the first metal layer downwardly to a wiring layer.
Dependencies are inferred from the claim text.