Method and apparatus for increasing the immunity of new generation microprocessors from ESD events

An apparatus for increasing the immunity of a microprocessor from electrostatic discharge events comprising:

• a substrate;
• a microprocessor mounted on the substrate;
• a thermal spreader in heat conducting relation with the microprocessor on a side of the microprocessor opposite the substrate;
• a heat sink in heat conducting relation with the thermal spreader on a side of the thermal spreader opposite the microprocessor;
• a gasket of a lossy material on the substrate surrounding the microprocessor to protect the microprocessor from electrostatic discharge pulses;
• and
• wherein the thermal spreader extends beyond the outer peripheral edge of the microprocessor and overhangs an adjacent edge of the gasket.

An electronic package with protection from electrostatic discharge events comprising:

• a substrate;
• a semiconductor die mounted on the substrate;
• a heat sink in heat conducting relation with the semiconductor die on a side of the semiconductor die opposite the substrate;
• and
• a gasket of a lossy material on the substrate surrounding the semiconductor die to protect the die from electrostatic discharge pulses.

A method for increasing the immunity of a microprocessor from electrostatic discharge events comprising:

• mounting a microprocessor on a substrate;
• surrounding the microprocessor with a gasket formed of lossy, static dissipative material having a volume resistivity of greater than 102 ohm cm;
• and
• arranging a heat spreader in heat conducting relation with the microprocessor and atop at least a portion of the gasket.