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US 2003/0111710 A1Published application
Metal core integrated circuit package with electrically isolated regions and associated methods
AssigneeIntel Corporation
InventorsJohn Guzek, Dustin Wood
Life of this patent
Estimating the term…
Abstract
An integrated circuit chip package having a metal substrate core having two or more electrically isolated regions, wherein the electrically isolated regions of the metal substrate core may be coupled with voltage rails of an integrated circuit chip.
Claims20
An integrated circuit chip package comprising:
- a metal substrate core including,
- a first region, and
- a second region electrically isolated from the first region.
An integrated circuit chip package comprising:
- a metal substrate core;
- the metal substrate core having at least two electrically isolated regions;
- wherein at least one of the electrically isolated regions of the metal substrate core is coupled with a digital ground of an integrated circuit chip.
An integrated circuit chip package comprising:
- a metal substrate core;
- the metal substrate core having at least three electrically isolated regions;
- wherein at least one of the electrically isolated regions of the metal substrate core is coupled with a digital ground of an integrated circuit chip and has input and output signals routed through it.
A method comprising:
- creating initial clearances on a metal substrate core that do not fully electrically separate the core into two ore more regions;
- filling the initial clearances with dielectric material;
- and
- creating final clearances that fully electrically separate the two or more regions of the metal substrate core.
1 more element
Dependencies are inferred from the claim text.