Differential CMOS logic with dynamic bias
AssigneeHewlett-Packard Development Company, L.P.
InventorDerek Knee
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AssigneeHewlett-Packard Development Company, L.P.
InventorDerek Knee
Estimating the term…
A CMOS circuit arrangement. In this arrangement, relatively thick oxide devices are fabricated along with relatively thin oxide devices on the same chip. High speed logic circuits are fabricated with thin oxide devices as differential logic operating with a low voltage swing. A current source is fabricated using thick oxide devices to drop a large percentage of the supply voltage, protecting the thin oxide devices from damage caused by large voltage swings. An adaptive bias control circuit receives inputs from the logic circuit or elsewhere to control the bias current available from the current source to permit larger currents to pass through the current source at switching times.
A CMOS circuit fabricated using a process that can create thick oxide transistors and thin oxide transistors, comprising:
A CMOS circuit fabricated using a process that can create thick oxide transistors and thin oxide transistors, comprising:
A CMOS circuit fabricated using a process that can create thick oxide transistors and thin oxide transistors, comprising:
Dependencies are inferred from the claim text.