Semiconductor device having a ground plane and manufacturing method thereof

A semiconductor device comprising:

• at least one lower layer wiring provided on a surface of an insulator on a semiconductor substrate;
• a first interlayer film provided on said insulator to cover a surface of said lower layer wiring;
• a connection wiring which is provided on said first interlayer film and comprises first and second films contacting said lower layer wiring;
• a plate electrode which is provided on said first interlayer film and comprises at least said first film;
• a second interlayer film provided on said connection wiring, said plate electrode, and said first interlayer film;
• and
• a first upper layer wiring and a second upper layer wiring which are provided on said second interlayer film and connected to said connection wiring and said plate electrode, respectively.

A manufacturing method of a semiconductor device, comprising:

• forming at least first and second lower layer wirings on a surface of an insulator provided on a semiconductor substrate;
• forming a first interlayer film on said insulator to cover surfaces of said first and second lower layer wirings;
• forming first and second through-holes which reach said first and second lower layer wirings through said first interlayer film;
• forming a first film on a surface of said first interlayer film including insides of said first and second through-holes;
• forming a second film on said first film and completely filling said first and second through-holes;
• selectively removing said second film remaining on said first film except insides of said first and second through-holes;
• and
• patterning said first film and forming first and second connection wirings connected to said first and second lower layer wirings respectively and a plate electrode continuous with said second connection wiring.

A manufacturing method of a semiconductor device, comprising:

• forming at least one lower layer wiring on a surface of an insulator provided on a semiconductor substrate;
• forming a first interlayer film on said insulator to cover a surface of said lower layer wiring;
• forming a through-hole which reaches said lower layer wiring through said first interlayer film;
• forming a first film on a surface of said first interlayer film including an inside of said through-hole;
• forming a second film on said first film and completely filling said through-hole;
• selectively removing said second film remaining on said first film except an inside of said through-hole;
• patterning said first film and forming a connection wiring connected to said lower layer wiring and a plate electrode;
• forming a second interlayer film on said first interlayer film including said connection wiring and said plate electrode;
• and
• forming a first upper layer wiring connected to said connection wiring and a second upper layer wiring connected to said plate electrode on said second interlayer film.