Method and configuration for the output of bit error tables from semiconductor devices
AssigneeInfineon Technologies AG
InventorsThomas Janik, Sebastian Kuhne, Roderick McConnell, Detlev Richter, Wolfgang Spirkl
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Abstract
A method and a configuration for the output of bit error tables from semiconductor devices are described. A test control unit reads the bit error table from the memory device following a request from the test apparatus. Then, the bit error tables are transmitted sequentially to the test apparatus for further processing.
Claims19
A method for outputting at least one bit error table from a semiconductor device to a test apparatus, the semiconductor device having a test control unit and a memory device and the test apparatus operating the test control unit, which comprises the steps of:
- reading, via the test control unit, the bit error table from the memory device following a request from the test apparatus;
- and
- transmitting the bit error table sequentially to the test apparatus.
A configuration for outputting a bit error table, comprising:
- a semiconductor device having a test control unit, and a memory device connected to said test control unit, said test control unit having a counter, a test control table connected to said counter, and two driver stages coupled to said memory device and controlling a sequential reading of the bit error table from said memory device, irrespective of a configuration of said memory device;
- and a test apparatus coupled to and operating said test control unit.
In a semiconductor device having a memory device, a configuration for outputting a bit error table from the semiconductor device to a test apparatus, the configuration comprising:
- a test control unit to be coupled to and controlled by the test apparatus, said test control unit having a counter, a test control table connected to said counter, and two driver stages coupled to the memory device and controlling a sequential reading of the bit error table from the memory device, irrespective of a configuration of the memory device.
Dependencies are inferred from the claim text.