US 2003/0079072 A1 · Competition arbitration system

Abstract

A competition arbitration system in which chances for using a resource of a computer such as a bus or the like among devices are fair is provided. Pulses are sequentially generated periodically from a pulse generating circuit. It is assumed that first device outputted first bus request signal and second device continuously outputted second bus request signal before rising timing of the first pulse. When a bus arbiter outputs a bus grant signal to the first device at the rising timing of the first pulse, the bus master of the first device outputs a bus use acknowledgment signal. Then a use grant inhibiting circuit receives the acknowledgment signal and outputs an inhibition signal for inhibiting use of other devices. Thus, the first device holds the use right of a bus and bus use requests of other devices are reserved.

Claims14

Dependent claims

A competition arbitration system comprising:

N (N is a positive integer of 2 or more) devices using a predetermined resource of a computer;
N control means each of which is provided for each of said devices, outputs a use request signal for using said resource, and outputs a use acknowledgment signal in response to a use grant signal which is sent from an outside on the basis of said use request signal;
and
a bus arbiter having pulse generating means which sequentially forms N use grant pulses every period at regular pulse intervals and generates said use grant pulses, use grant inhibiting means to which the use acknowledgment signals which are outputted from said N control means are inputted and which outputs an inhibition signal for inhibiting a use grant to said control means of the devices in which the use of said resource is not granted, and N gate circuits which can output said use grant signal to each of said N control means.

1 more element

A competition arbitration system comprising:

N (N is a positive integer of 2 or more) devices using a predetermined resource of a computer;
N control means each of which is provided for each of said devices, outputs a use request signal for requesting use of said resource, and outputs a use acknowledgment signal in response to a use grant signal which is sent from an outside on the basis of said use request signal;
and
a bus arbiter having pulse generating means which sequentially forms N use grant pulses every period at regular pulse intervals and generates said use grant pulses, use grant inhibiting means to which the use acknowledgment signals which are outputted from said N control means are inputted and which outputs an inhibition signal for inhibiting a use grant to said control means of the devices in which the use of said resource is not granted, and N gate circuits which can output said use grant signal to each of said N control means,
wherein each of said gate circuits of said bus arbiter is constructed in a manner such that said use request signal and use acknowledgment signal which are outputted from each of said control means, each of said use grant pulses which are generated from said pulse generating means, and said inhibition signal which is outputted from said use grant inhibiting means are inputted, respectively, said use grant signal corresponding to said use grant pulse is outputted to said control means of said device in which the use of the resource is granted, and said use grant pulse to said control means of said devices in which the use of the resource is not granted is shut off, thereby stopping the output of said use grant signal.

2 more elements

Dependencies are inferred from the claim text.

Competition arbitration system

Life of this patent

Competition arbitration system

Life of this patent

Abstract

Claims14