Method and apparatus for cache space allocation
AssigneeAgere Systems Inc.
InventorsHarry Dwyer, John Susantha Fernando
Life of this patent
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AssigneeAgere Systems Inc.
InventorsHarry Dwyer, John Susantha Fernando
Estimating the term…
A method and apparatus are disclosed for allocating a section of a cache memory to one or more tasks. A set index value that identifies a corresponding set in the cache memory is transformed to a mapped set index value that constrains a given task to the corresponding allocated section of the cache. The allocated cache section of the cache can be varied by selecting an appropriate map function. When the map function is embodied as a logical and function, for example, individual sets can be included in an allocated section, for example, by setting a corresponding bit value to binary value of one. A cache addressing scheme is also disclosed that permits a desired portion of a cache to be selectively allocated to one or more tasks. A desired location and size of the allocated section of sets of the cache memory may be specified.
A cache memory, comprising:
A method for allocating space in a cache memory, said method comprising the steps of:
A cache memory, comprising:
An integrated circuit, comprising:
Dependencies are inferred from the claim text.