Interconnects with dual dielectric spacers and method for forming the same
OwnerCheng-Hui Chung, Yei-Hsiung Lin +1inventors
InventorsCheng-Hui Chung, Yei-Hsiung Lin, Chen-Chiu Hsue
Life of this patent
Estimating the term…
Loading patent…
OwnerCheng-Hui Chung, Yei-Hsiung Lin +1inventors
InventorsCheng-Hui Chung, Yei-Hsiung Lin, Chen-Chiu Hsue
Estimating the term…
A method and a structure of interconnects with dual dielectric spacers is disclosed. A substrate with a plurality of interconnects is provided. A first dielectric layer is formed on the interconnects and the substrate. The first dielectric layer is partially etched back to expose a partial surface of the substrate and the top surface of the interconnects, leaving remaining first dielectric layers on the sides of the interconnects as first spacers. A second dielectric layer is formed on the interconnects, the first spacers and the substrate. The second dielectric layer is partially etched back to expose a partial surface of the substrate and the top surface of the interconnects, leaving remaining first spacers on the surface of the first spacers as second spacers. A third dielectric layer is formed on the substrate, the second spacers and the interconnects. Thus, the first spacers serve as stress buffer layers and the second spacers serve as etching stop layers and/or supporting layers of the interconnects.
A method of manufacturing interconnects with dual dielectric spacers, comprising the steps of:
A structure of interconnects with dual dielectric spacers, comprising:
Dependencies are inferred from the claim text.