FIB/RIE method for in-line circuit modification of microelectronic chips containing organic dielectric
AssigneeInternational Business Machines Corporation
InventorEdward J. Crawford
Life of this patent
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Abstract
A method for circuit modification of an microelectronic chip having at least one conductor in an organic dielectric, includes applying a protective inorganic surface layer on top of the organic dielectric, forming at least one window in the protective inorganic surface layer to selectively expose the underlying organic dielectric, etching the organic dielectric in the window area to selectively remove the organic dielectric adjacent to the conductor, and performing at least one process that modifies the conductor.
Claims33
A method for circuit modification of a microelectronic chip comprising at least one conductor in an organic dielectric, said method comprising:
- applying a protective inorganic surface layer on said organic dielectric;
- forming at least one window in said protective inorganic surface layer to selectively expose an underlying portion of said organic dielectric;
- etching said organic dielectric in an area of said at least one window to selectively remove said organic dielectric adjacent to said at least one conductor;
- and
- performing at least one process that modifies said at least one conductor.
A method of selectively removing organic dielectric adjacent to a conductor, said method comprising:
- depositing a protective inorganic surface layer onto said organic dielectric;
- forming at least one window in said protective inorganic surface layer to selectively expose an underlying portion of said organic dielectric;
- and
- etching said organic dielectric in an area of said at least one window to selectively remove said organic dielectric adjacent to said conductor.
A method of manufacturing an electronic device having at least one layer of organic dielectric, said method comprising:
- depositing a protective inorganic surface layer onto said at least one layer of organic dielectric;
- forming at least one window in said protective inorganic surface layer to selectively expose an underlying portion of said organic dielectric;
- and
- etching said organic dielectric in an area of said at least one window to selectively remove said organic dielectric.
A method for circuit modification of a microelectronic chip comprising at least one conductor embedded in an organic dielectric layer, said method comprising:
- applying a protective inorganic layer onto a surface of said organic dielectric layer, such that said protective layer is contiguous to said organic layer;
- opening at least one window in said protective inorganic layer to selectively expose an underlying portion of said organic dielectric;
- and
- performing at least one process that modifies said a first conductor of said at least one conductor.
A method of selectively removing organic dielectric on a microelectronic chip comprising:
- depositing an inorganic surface layer on top of and contiguous to said organic dielectric;
- forming at least one window in said inorganic surface layer to selectively expose an underlying portion of said organic dielectric;
- and
- etching said organic dielectric in an area of said at least one window, thereby selectively removing said organic dielectric.
A method of selectively removing organic dielectric on a microelectronic chip comprising the steps of:
- a step of providing a protective inorganic surface layer on top of said organic dielectric;
- a step of providing at least one opening in said protective inorganic surface layer to selectively expose the underlying said organic dielectric;
- and
- a step of etching said organic dielectric in said at least one opening.
A method of selectively removing, in a microelectronic chip, an organic dielectric adjacent to a conductor prior embedded in said layer prior to modifying said conductor, said method comprising:
- etching said organic dielectric using reactive ion etching.
A method of repairing a microelectronic chip containing at least one conductor, said method comprising:
- selectively removing dielectric material adjacent to said conductor prior to performing a procedure that modifies said conductor.
A method of performing circuit modifications having multiple levels of conductors embedded in respective multiple layers of organic dielectric, comprising:
- providing at least one first opening through all overlying layers to expose said first organic layer;
- etching said first organic layer through opening in overlying layers using reative ion etching;
- etching through a first underlying isolation layer to expose a second organic layer.
A method of performing circuit modifications having multiple levels of conductors embedded in respective multiple layers of organic dielectric, at least one of said multiple layers containing a first conductor that obstructs a work area for a target second conductor located in a second lower level organic dielectric layer, said method comprising:
- providing at least one first opening through all overlying layers to expose said first organic layer containing said first conductor;
- etching through said first conductor an opening sufficient to create a work area for said underlying target conductor;
- etching through a first underlying isolation layer to expose any underlying layers separating said first organic layer from said second organic layer containing said target conductor, and etching through said separating layers;
- and
- etching second organic layer to selectively remove organic dielectric adjacent to said target conductor using reactive ion etching.
A method of performing circuit modifications having multiple levels of conductors embedded in respective multiple layers of organic dielectric, a first surface organic dielectric layer containing a first conductor that obstructs a work area for a target second conductor located in a second lower level organic dielectric layer, said method comprising:
- applying a first protective inorganic or mask layer;
- providing an opening through said first protective inorganic or mask layer over target conductor;
- through this opening, etching said first conductor an opening sufficient to create a work area for said underlying target conductor;
- etching through a first underlying isolation layer to expose any underlying layers separating said first organic layer from said second organic layer containing said target conductor, and etching through said separating layers;
- and
- etching second organic layer using a reactive ion etching to selectively remove organic dielectric adjacent to said first conductor.
Dependencies are inferred from the claim text.