Metal interconnection with low resistance in a semiconductor device and a method of forming the same
AssigneeSamsung Electronics Co., Ltd.
InventorsJu-Cheol Shin, In-Sun Park
Life of this patent
Estimating the term…
Abstract
The present invention relates to metal interconnections for bit lines having a low resistance and an advanced morphology and a method of forming the same including: forming an inter-layer insulation film on a semiconductor substrate, the inter-layer insulation film containing a contact hole for the bit line; forming a plug within the contact hole; forming a barrier metal defined on the plug; and forming a bit line on the inter-layer insulation film.
Claims56
A method of forming a metal interconnection structure comprising:
- forming an inter-layer insulation film on a semiconductor substrate, the inter-layer insulation film containing a bit line contact hole;
- forming a plug in the bit line contact hole;
- and
- forming a bit line including a bit line barrier metal formed on the plug and a bit line metal film formed on the barrier metal and the inter-layer insulation film.
A method of forming a metal interconnection structure comprising:
- forming an inter-layer insulation film on a semiconductor substrate, the inter-layer insulation film containing a bit line contact hole;
- forming a plug in the bit line contact hole;
- partially etching the plug in the bit line contact hole;
- forming a bit line barrier metal to be defined on the plug that has been partially etched;
- and
- forming a bit line on the bit line barrier metal and the inter-layer insulation film.
A method of forming a metal interconnection structure comprising:
- forming an inter-layer insulation film on a semiconductor substrate;
- forming a bit line contact hole by using a mask to selectively etch the inter-layer insulation film;
- forming a plug in the bit line contact hole;
- depositing a bit line barrier metal on the plug and the inter-layer insulation film;
- etching the bit line barrier metal to be defined on the plug;
- and
- forming a bit line on the bit line barrier metal and the inter-layer insulation film.
A metal interconnection structure of a semiconductor device comprising:
- an inter-layer insulation film formed on a semiconductor substrate, the inter-layer insulation film containing a bit line contact hole;
- a plug formed in the contact hole;
- and
- a bit line including a bit line barrier metal defined on the plug within the contact hole, and a bit line metal film formed on the bit line barrier metal and the inter-layer insulation film.
A metal interconnection structure of a semiconductor device, comprising:
- an inter-layer insulation film formed on a semiconductor substrate, the inter-layer insulation film containing a bit line contact hole;
- a plug partially filling the contact hole;
- a bit line barrier metal defined on the plug and filling the rest of the contact hole;
- and
- a bit line formed on the bit line barrier metal and the inter-layer insulation film.
A metal interconnection structure of a semiconductor device, comprising:
- an inter-layer insulation film formed on a semiconductor substrate, the inter-layer insulation film containing a bit line contact hole;
- a plug completely filling the contact hole;
- a bit line barrier metal defined on the plug in the contact hole;
- and
- a bit line formed on the bit line barrier metal and the inter-layer insulation film.
Dependencies are inferred from the claim text.