Dual damascene integration scheme using a bilayer interlevel dielectric

A method for forming a semiconductor device, such method comprising:

• depositing a first metallization layer over a substrate;
• patterning the first metallization layer;
• forming a first dielectric layer over the first metallization layer;
• forming a via in a portion of the first dielectric layer;
• forming a second dielectric layer over the first dielectric layer, such second dielectric layer being formed with a dielectric constant lower than the dielectric constant of the first dielectric layer;
• forming a trench in a portion of the second dielectric layer with a portion of said trench being formed over the via;
• and
• depositing a second metallization layer, the second metallization layer fills the via and the trench, and a portion of the first metallization layer is in contact with a portion of the second metallization layer.

A method for forming a semiconductor device, such method comprising:

• forming an inorganic dielectric layer over a substrate;
• forming a via in a portion of the inorganic dielectric layer;
• forming an organic dielectric layer over the inorganic dielectric layer;
• and
• forming a trench in a portion of the organic dielectric layer with a portion of said trench being formed over the via.

A semiconductor structure, comprising:

• a semiconductor substrate;
• a dielectric layer disposed over the substrate, said dielectric layer having a first trench;
• a first metal layer disposed in the first trench;
• a first layer of a material having a first dielectric constant disposed over the dielectric layer, said first layer having a via in registration with the first metal layer disposed in the first trench;
• a second layer of a material having a second dielectric constant disposed over the first layer of material, said second layer having a second trench in registration with the via and the first dielectric constant is higher than the second dielectric constant;
• and
• a second metal layer disposed in the via and second trench, said second metal layer being in contact with said first metal layer.

A semiconductor structure, comprising:

• a semiconductor substrate;
• a dielectric layer disposed over the substrate, said dielectric layer having a first trench;
• a first metal layer disposed in the first trench;
• a layer of an inorganic dielectric material disposed over the dielectric layer, said inorganic dielectric layer having a via in registration with the metal disposed in the first trench;
• a layer of an organic material disposed over the layer of inorganic dielectric material, said layer of organic material having a second trench in registration with the via;
• and
• a second metal layer disposed in the via and second trench, said second metal layer being in contact with said first metal layer.