Structure and method for fabrication of a leadless chip carrier with embedded inductor

A structure comprising:

• a substrate having a top surface for receiving a die;
• a conductor patterned within said substrate, a first substrate signal bond pad being a first terminal of said conductor and a second substrate signal bond pad being a second terminal of said conductor;
• a printed circuit board attached to a bottom surface of said substrate;
• at least one via in said substrate;
• said at least one via providing an electrical connection between a die signal bond pad and said printed circuit board.

A method for fabricating a structure for receiving a semiconductor die, said method comprising steps of:

• drilling a first hole in a substrate;
• filling said first hole with metal to form a first via;
• patterning a conductor on a top surface of said substrate, a first terminal of said conductor being adapted for connection to a substrate signal bond pad and a second terminal of said conductor being adapted for connection to a die signal bond pad;
• patterning a support pad on said top surface of said substrate, and patterning a heat spreader on a bottom surface of said substrate, said first via providing an electrical connection between said heat spreader and said support pad, said support pad being suitable for receiving said semiconductor die.