Dual hardmask single damascene integration scheme in an organic low k ILD

Abstract

A process of using a dual hardmask single damascene process integration scheme in an organic low k interlayer dielectric (ILD) to make a semiconductor comprising: a) providing a semiconductor substrate; b) depositing an organic low k ILD layer on the substrate; c) forming a hardmask 1 on the organic low k ILD layer and forming a sacrificial hardmask 2 on hardmask 1; d) forming a patterned photoresist layer on sacrificial hardmask 2; e) performing an etch selective to sacrificial hardmask 2 and stripping the photoresist; f) performing an etch of hardmask 1 in which the etch is selective to the organic low k ILD layer; g) depositing a liner or conformal barrier layer over the substrate, organic low k ILD layer, hardmask 1 and hardmask 2; h) forming a plated metal layer over the liner or conformal barrier layer; and i) removing the metal layer and removing said liner with simultaneous removal of sacrificial hardmask 2 in a manner such that facets in sacrificial hardmask 2 are removed during liner/sacrificial hardmask 2 removal.

Dependencies are inferred from the claim text.