Dual-bit flash memory built from a discontinuous floating gate

Abstract

A dual-bit flash memory forming by discontinuous floating gates is disclosed. The memory cell of the dual-bit flash memory contains a P type semiconductor substrate or an N type semiconductor substrate with a source and a drain therein. At least two floating gates are installed on the semiconductor substrate between the source and the drain. A tunneling dielectric layer is used to isolate the floating gates and the semiconductor substrate. An insulated dielectric layer is formed on the surface of the floating gates and the central exposed semiconductor substrate. Then, another control gate is formed on the insulated dielectric layer. Thereby, a dual-bit flash memory cell is formed. In the present invention, under a condition of without increasing the density of the unit memory cell, the capacity of memory is twice.

Dependencies are inferred from the claim text.