Method of forming low resistance vias
AssigneeAdvanced Micro Devices, Inc.
InventorsMinh Van Ngo, Robert A. Huertas, Dawn Hopper
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AssigneeAdvanced Micro Devices, Inc.
InventorsMinh Van Ngo, Robert A. Huertas, Dawn Hopper
Estimating the term…
Low resistant vias are formed by sequentially treating an opening in an interlayer dielectric and the exposed surface of a lower metal feature with an NH3 plasma followed by a N2/H2 plasma, thereby removing any oxide on the metal surface and removing residual polymers or polymeric deposits generated during etching to form the opening. Embodiments include forming a dual damascene opening in a low-k interlayer dielectric exposing the upper surface of a lower Cu or Cu alloy feature, sequentially treating the opening and the upper surface of the lower metal feature with an NH3 plasma and then with a N2/H2 plasma, Ar sputter etching, depositing a barrier layer lining the opening, depositing a seedlayer and filling the opening with Cu or a Cu alloy.
A method of manufacturing a semiconductor device, the method comprising:
Dependencies are inferred from the claim text.