US 2002/0160566 A1 · Semiconductor integrated circuit device and process for manufacturing the same

Abstract

There is provided a technique for forming an Ru film on the bottom of a deep hole with a considerable film thickness for the lower electrode of an information storage capacity element in order to improve the yield of manufacturing DRAMs. The Ru film is formed on the side wall and the bottom of a deep hole as material for preparing the lower electrode of an information storage capacity element to be produced there under the condition of a gasification flow rate ratio of the raw materials ((Ru(C2H5C5H4)2/O2) is not less than 10% Then, the ratio of the film thickness of the Ru film on the bottom “b” of the hole to the largest film thickness “a” of the Ru film in the hole is not less than 50%.

Claims5

Dependent claims

A process for manufacturing a semiconductor integrated circuit device, comprising:

(a) forming an interlayer insulating film over a semiconductor substrate;
(b) forming a hole in said interlayer insulating film;
(c) forming a first electrically conductive film over a side wall and a bottom of said hole by reacting an organic compound of material of said first electrically conductive film and an oxidizing agent, a gasification flow rate of said organic compound of material of said first electrically conductive film being not less than 5% of a flow rate of the oxidizing agent;
(d) forming an insulating film over said first electrically conductive film;
and
(e) forming a second electrically conductive film on said insulating film.

3 more elements

Dependencies are inferred from the claim text.

Facts

Application

10/173,159Filed 18 Jun 2002

Priority

JP 2000-32211723 Oct 2000

Published

31 Oct 2002

Term ends

Not estimatedThe source records don’t support an estimate.

Classification17 codes

H10W 20/069
Of conductive parts of the interconnections: by forming self-aligned vias or self-aligned contact plugs
C23C 16/40
Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides: oxides
H10D 1/042
Of capacitors having no potential barriers: using deposition processes to form electrode extensions
H10D 1/692
Capacitors having no potential barriers: electrodes

Semiconductor integrated circuit device and process for manufacturing the same

Life of this patent

Semiconductor integrated circuit device and process for manufacturing the same

Life of this patent

Abstract

Claims5