Noise suppression circuitry and method
AssigneeSTMicroelectronics S.r.l.
InventorDavid C. McClure
Life of this patent
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Abstract
A circuit and method are disclosed for monitoring the voltage level of an electrical signal, such as an unregulated power supply. The circuit includes a comparator that compares the electrical to the voltage reference and generates an output having a value that is based upon the comparison. A oscillation suppression circuit receives the output of the comparator and generates an output signal that follows the output of the comparator once the output of the comparator remains stable and in the same logic state for a predetermined of time.
Claims29
A power supply detect circuit, comprising:
- a comparator for comparing a power supply signal and a reference voltage signal and generating an output signal based upon the comparison;
- and
- a first circuit having an input coupled to the output of the comparator and an output signal driven to a first logic state upon the output of the comparator being in the same logic state substantially entirely over a plurality of consecutive time periods.
A method for monitoring an electrical signal, comprising:
- receiving a digital signal;
- and
- generating an output signal having a logic state that substantially matches the logic state of the digital signal upon the digital signal being in the same logic state substantially entirely over a predetermined period of time.
An integrated circuit, comprising:
- a noise suppression circuit having an input coupled to receive a first signal and an output signal that is asserted when the first signal is in the asserted state substantially entirely over a predetermined period of time and de-asserted when the first signal is in a de-asserted state substantially entirely over a predetermined period of time.
A circuit for monitoring an electrical signal, comprising:
- means for receiving a digital signal;
- and
- means for generating an output signal having a logic state that substantially matches the logic state of the digital signal upon the digital signal being in the same logic state substantially entirely over a predetermined period of time.
Dependencies are inferred from the claim text.