A method for producing an electronic component with a semiconductor chip having an active front face, a passive rear face, contact connections on the active front face and contact surfaces on the passive rear face, and a conductive connection plane with structured conductive tracks on an etched edge of the semiconductor chip for providing an electrical connection from the active front face to the passive rear face, the method which comprises:
- providing a semiconductor wafer with semiconductor chips disposed in rows and columns and with saw track regions provided between the semiconductor chips;
- applying an insulation layer for protecting and for insulating the active front face of the semiconductor chips;
- applying an etching mask on the passive rear face of the semiconductor chips such that the saw track regions are not covered by the etching mask;
- anisotropically etching the saw track regions, which have not been covered by the etching mask, from the passive rear face until reaching an SiO2 layer on the active front face, with the SiO2 layer acting as an etch stop;
- removing the SiO2 layer from the front face and singling the semiconductor wafer for separating the semiconductor chips from one another;
- removing the etching mask;
- passivating the rear face and side edges of the semiconductor chips;
- coating the side edges of the semiconductor chips with at least one of an adhesion promoter and a surface coating which can be soldered;
- metalizing the side edges;
- structuring the insulation layer for exposing the contact connections on the active front face of the semiconductor chips;
- and
- applying the conductive tracks for providing a wiring on the insulation layer such that the conductive tracks connect the contact surfaces on the passive rear face to corresponding ones of the contact connections on the active front face.