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OwnerMasahiko Ogino, Shuji Eguchi +10inventors
InventorsMasahiko Ogino, Shuji Eguchi, Akira Nagai, Takumi Ueno, Masanori Segawa, Hiroyoshi Kokaku, Toshiaki Ishii, Ichiro Anjoh, Asao Nishimura, Chuichi Miyazaki, Mamoru Mita, Norio Okabe
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In a semiconductor device having a three-layered buffer layer comprising core layer 1 having interconnected foams such as a three-dimensional reticular structure and adhesive layers 2 proved on both sides of the core layer as a stress buffer layer between semiconductor chip 5 and wiring 4 to lessen a thermal stress generated between the semiconductor device and the package substrate, where a thickness ratio of core layer 1 to total buffer layer is at least 0.2, the production process can be simplified by using such a buffer layer, thereby improving the mass production capacity and enhancing the package reliability.
A semiconductor device, which comprises a semiconductor chip having a circuit-formed surface provided with a group of terminals thereon;
A semiconductor device, which comprises a semiconductor chip having a circuit-formed surface provide with a group of terminals thereon;
A semiconductor device, which comprises a semiconductor chip having a circuit-formed surface provided with a group of terminals thereon;
A wiring tape for a semiconductor device, which comprises a wiring layer comprising an insulating layer and a wiring on the insulating layer, one end of the wiring being connected to terminals on the semiconductor chip and the other end of the wiring being connected to external terminals for connecting to a package substrate;
Dependencies are inferred from the claim text.