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AssigneeInternational Business Machines Corporation
InventorsGeorge Laing-Tai Chiu, John Harold Magerlein
Estimating the term…
A semiconductor or dielectric wafer with conducting vias is used as a substrate in an integrated circuit packaging structure, where high density inter and intra chip contacts and wiring are positioned on the substrate face on which the integrated circuitry is mounted, and external signal and power circuitry is contacted through the opposite face. Use of a substrate such as silicon permits the use of conventional silicon processes available in the art for providing high wiring density together with matching of the thermal expansion coefficient of any silicon chips in the integrated circuits. The use of vias through the substrate allows a high density of connections leaving the silicon substrate and provides short paths for the connections of power and signals.
In an integrated circuit package wherein components including integrated circuit elements are interconnected into a functional unit and then further connected into power and signal external circuitry, the improvement comprising:
The method of interconnecting integrated circuit elements into a functional circuit unit and then further connecting said unit into power and signal external circuitry, comprising the steps of:
In interconnecting integrated circuit elements with each other and into power and external circuitry, the packaging method comprising the steps of:
Dependencies are inferred from the claim text.