MIS field effect transistor and manufacturing method thereof
OwnerTohru Mogamiinventor
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Abstract
A gate electrode film of an MIS field effect transistor is formed to have a layered structure composed of conductor films, and so as to have a lower conductor film in contact with a gate insulation film approximately thin enough for at least allowing an upper layer conductor film to displace a potential of a substrate channel region and have a lower layer conductor film of one gate electrode film and a lower layer conductor film of the other gate electrode film of different electric polarity differ in film thickness from each other.
Claims12
An MIS field effect transistor, comprising
- a gate electrode film having a layered structure composed of conductor films,
- said conductor film at a lowermost layer in contact with a gate insulation film is approximately thin enough to at least allow upper layer said conductor film to displace a potential of a substrate channel region, and
- said lowermost layer conductor film at one said gate electrode film and said lowermost layer conductor film at the other said gate electrode film whose electric polarity is different from that of one said gate electrode film are formed to have different film thicknesses from each other.
An MIS field effect transistor manufacturing method, comprising the steps of:
- forming a gate insulation film on a semiconductor substrate on which an element isolation region is formed;
- on said gate insulation film, depositing a first conductor film which forms a gate electrode to have a thickness approximately enough for at least allowing an upper layer conductor film to be deposited at a later step to displace a potential of a substrate channel region;
- appropriately removing said first conductor film which forms a gate electrode of one electric polarity in said MIS field effect transistor by etching;
- on said first conductor film, depositing a second conductor film made of a material different from that of said first conductor film;
- forming a gate electrode pattern by etching for a layered film composed of said first conductor film and said second conductor film;
- and
- doping predetermined impurities into a source/drain region of each electric polarity in said semiconductor and activating the impurities by heat treatment.
The MIS field effect transistor manufacturing method as set forth inclaim 9, further comprising,
- between said first conductor film removing step and said second conductor film depositing step, a step of depositing an interlayer formed of a metallic nitride film or a metallic oxide film.
Dependencies are inferred from the claim text.