Computer method and apparatus for division and square root operations using signed digit

22) In a computer system including:

• a central processing unit;
• a memory connected to the processing unit by a processor bus;
• and
• a floating point logic in the central processing unit comprising an apparatus for performing a square root operation on a radicand, producing a root digit, the apparatus comprising:
• a decoder, the decoder computing the root digit and a binary correction term dependent on a number of bits of a current signed digit partial remainder;
• an adder connected to the decoder, the adder generating a signed digit result by subtracting the binary correction term from the current signed digit partial remainder;
• and
• a scaler connected to the adder, the scaler computing a next signed digit partial remainder dependent on the signed digit result.

23) In a computer system, apparatus for performing a square root operation on a radicand, producing a root digit, the apparatus comprising:

• a square unit logic;
• means, within the square root unit for computing the root digit and a binary correction term dependent on a number of digits of a current signed digit partial remainder;
• means, within the square root unit for generating a signed digit result by subtracting the binary correction term from the current signed digit partial remainder;
• and
• means, within the square root unit for computing a next signed digit partial remainder dependent on the signed digit result.

35) In a computer system, a method for performing a square root operation on a radicand, producing a root digit, comprising the steps of:

• computing the root digit and a binary correction term dependent on a number of digits of a current signed digit partial remainder;
• generating a signed digit result by subtracting the binary correction term from the current signed digit partial remainder;
• and
• computing a next signed digit partial remainder dependent on the signed digit result.