Method of fabricating bit line and bit line contact plug of a memory cell

Abstract

A method of fabricating a bit line contact plug of a memory cell is disclosed. First, a semiconductor substrate having a transistor, comprising at least one diffused region is provided. A first insulating layer is formed on the substrate. A first masking layer is formed on the first insulating layer. The first masking layer and the first insulating layer are defined to form a first trench, which is above the diffusion region. A second masking layer is formed to fill the first trench. the materials of the first masking and the second masking are different. A hole is formed by removing the portion of the second masking layer, which is above the diffusion region. By using the first masking layer and the residual second masking layer as the mask, a bit line contact window is formed by removing a portion of the first insulating layer right beneath the hole until the surface of the diffusion region is exposed. A bit line contact plug is formed by forming a first conductive layer to fill the bit line contact window. The residual second masking layer is removed to form a second trench. Thereafter, the first masking layer is removed. A bit line is formed by forming a second conductive layer to fill the second trench, Thus, the fabrication of the bit line and the bit line contact plug of a memory cell is complete.

Dependencies are inferred from the claim text.