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US 2002/0117751 A1Published application
Semiconductor die package having mesh power and ground planes
AssigneeSilicon Bandwidth, Inc.
InventorsStanford W. Crane, Jr., Myoung-soo Jeon, Charley Takeshi Ogata, Ton-Yong Wang, Andreas C. Cangellaris, Jose Schutt-Aine
Life of this patent
Estimating the term…
Abstract
A cluster grid array semiconductor die package and mating socket provide electrical connection between one or more semiconductor dies housed within the die package and substrate, such as a printed circuit board, on which the mating socket is mounted. The die package and the mating socket may be easily connected and disconnected. The die package may include power and ground planes built into and distributed within the housing of the die package.
Claims30
A semiconductor die package comprising:
- a package housing for holding at least one semiconductor die, a substrate and at least one semiconductor die or more than one substrate and multiple semiconductor die, the housing including a base having a top surface for supporting the at least one semiconductor die, side surfaces, and a bottom surface having a plurality of posts extending therefrom, the base including a plurality of holes formed therethrough from the bottom surface to the top surface;
- a reference voltage plane within the package housing, said plane electrically coupled to a contact that is at least partially exposed externally of the package housing at one of the sides of the base;
- and
- a plurality of package pins retained in the holes and extending from the bottom surface of the base along the posts.
1 more element
A semiconductor die package comprising:
- a package housing comprising a base having a top surface for supporting at least one semiconductor die, multiple substrates and multiple semiconductor dies, or a substrate and at least one semiconductor die, the base including a plurality of holes formed therethrough;
- a plurality of electrically-conductive pins retained in the holes and extending from the base externally of the package housing;
- and
- a ground plane grid in the base, wherein said electrically-conductive pins are electrically insulated from and pass through the ground plane grid.
1 more element
A combination comprising:
- a semiconductor die package having (a) a package housing for holding a semiconductor die, the package housing including a base having a top surface for supporting the semiconductor die, side surfaces, and a bottom surface having a plurality of posts extending therefrom, the base including a plurality of holes formed therethrough from the bottom surface to the top surface, (b) a reference voltage plane within the package housing, said plane electrically coupled to a reference voltage contact that is at least partially exposed externally of the package housing at one of the sides of the base, and (c) a plurality of package pins retained in the holes and extending from the bottom surface of the base along the posts, said package pins having a first end adjacent the top surface and a second end;
- and
- a mating socket comprising (a) a socket housing having a top surface and a bottom surface, the top surface having a plurality of sockets, each socket sized to receive a post of the die package, (b) a plurality of socket contact beams having first ends located in the sockets and second ends extending from the bottom surface of the socket housing, and (c) at least one mating pin having a first end extending from the top surface of the socket housing and a second end extending from the bottom surface of the socket housing, wherein said package housing is capable of mating with the mating socket such that the posts are received in said sockets, the package pins engage the socket contact beams, and the reference voltage contact engages the mating pin.
A combination comprising:
- a semiconductor die package including (a) a package housing a base having a top surface for supporting at least one semiconductor die, the base including a plurality of holes formed therethrough, (b) a plurality of electrically-conductive package pins retained in the holes and extending from the base externally of the package housing, (c) and a ground plane grid in the base, wherein said electrically-conductive package pins are electrically insulated from and pass through the ground plane grid;
- and
- a mating socket including (a) a socket housing and (b) a plurality of electrically-conductive socket contact beams held in the socket housing, wherein the semiconductor die package and the mating socket connect together such that the package pins engage the socket contact beams to form electrical connections.
A method for manufacturing a semiconductor die package, comprising:
- molding a package base including a plurality of side walls and a floor having a plurality of holes formed therethrough, wherein interior surfaces of the side walls and floor form a cavity sized to hold a semiconductor die and wherein said molding includes molding an electrically conductive frame into the floor, said frame having a plurality of holes formed therein and the holes through the floor register with the holes of said frame;
- and
- inserting electrically-conductive pins into the holes in the floor such that the pins pass into the holes of the frame and extend from an exterior surface of the floor.
Dependencies are inferred from the claim text.