MIS transistor having a large driving current and method for producing the same

A method for producing a MIS transistor comprising a semiconductor substrate, source/drain regions formed on the substrate, and a gate electrode provided above a channel region between the source/drain regions, said method comprising the steps of:

• selectively forming an oxide film on said semiconductor substrate;
• using the selectively formed oxide film as a mask to carry out etching to form a groove;
• laminating a semiconductor layer in said groove to polish the top surfaces of said oxide film and said semiconductor film, and thereafter, removing said oxide film;
• using said semiconductor film as a mask to diffuse an impurity in the surface of said semiconductor substrate to form a grooved impurity diffusion region including the bottom of said groove;
• arranging a gate insulator film of a high dielectric film in a groove portion of said grooved impurity diffusion region so that the top surface of said gate insulator film is arranged farther from said semiconductor substrate than the top surface of said impurity diffusion region other than said groove portion;
• and
• forming a gate electrode on the top surface of said gate insulator film.

A method for producing a MIS transistor comprising a semiconductor substrate, source/drain regions formed on the substrate, and a gate electrode provided above a channel region between the source/drain regions, said method comprising the steps of:

• selectively forming a semiconductor layer on said semiconductor substrate;
• using the selectively formed semiconductor layer as a mask to diffuse an impurity in the surface of said semiconductor substrate to form an impurity diffusion region including an elevated impurity diffusion region elevated from a channel plane which is formed on the surface of the masked semiconductor substrate;
• forming an oxide film on the side of the surface of said elevated impurity diffusion region to use said semiconductor layer as a stopper to polish the surface of said oxide film, and thereafter, removing said semiconductor layer;
• forming a gate insulator film of a high dielectric film in a region bordering said elevated impurity diffusion region and said oxide film so that the top surface of said gate insulator film is arranged farther from said substrate than the interface between said impurity diffusion region and said oxide film;
• and
• forming a gate electrode on the top surface of said gate insulator film.

A method for producing a MIS transistor comprising a semiconductor substrate, source/drain regions formed on the substrate, and a gate electrode provided above a channel region between the source/drain regions, said method comprising the steps of:

• selectively depositing semiconductor layers serving as source/drain regions, which sandwich a region serving as a channel plane on said semiconductor substrate therebetween, so that an inclined surface is formed between the top surface of said semiconductor layers and said channel plane;
• forming a dummy gate insulator film and a dummy gate electrode including a second semiconductor layer on said channel plane, which borders the selectively formed semiconductor layers, by a technique including at least a lithography;
• using said second semiconductor layer as a mask to diffuse an impurity in the surface of said semiconductor substrate to form impurity diffusion regions;
• removing said dummy gate electrode, which is formed on a portion serving as said channel plane sandwiched between said impurity diffusion regions, by etching;
• depositing an insulator film of a high dielectric film on the whole surface of the exposed channel plane to form a gate insulator film, which has a cross section of a grooved space at the center thereof;
• and
• depositing a gate electrode on the top surface of said gate insulator film, which is formed on the whole surface so as to have a grooved space at the center thereof, to form a gate electrode having a cross section of a T shape.