High voltage MOS transistor

A method for making an integrated circuit with a high voltage MOS transistor that includes a source and a gate, the method comprising:

• implanting and diffusing a first concentration of dopant into a region of semiconductor to a first depth to form a first drain region;
• implanting and diffusing a second concentration of dopant that is lower than the first concentration of dopant into the region of semiconductor to form a second drain region that overlaps the first drain region and extends beyond the first drain region under the gate of the transistor;
• and
• implanting and diffusing a third concentration of dopant that is higher than the first concentration of dopant into the first drain region to a second depth less than the first depth to form a third drain region.

A method for making an integrated circuit with a high voltage MOS transistor, the method comprising:

• implanting and diffusing a first concentration of dopant into semiconductor to a first depth to form a first drain region;
• forming a gate over a body region of the semiconductor;
• implanting and diffusing a second concentration of dopant that is lower than the first concentration of dopant into the semiconductor to form a first source region and a second drain region, wherein the second drain region overlaps the first drain region and extends beyond the first drain region under the gate;
• and
• implanting and diffusing a third concentration of dopant that is higher than the first concentration of dopant into the first source region and the first drain region to a second depth that is less than the first depth to form a second source region and a third drain region.

A method for making an integrated circuit with a high voltage MOS transistor, the method comprising:

• forming a gate over a body region of semiconductor;
• implanting and diffusing a first concentration of dopant into the semiconductor to a first depth to form a first drain region;
• implanting and diffusing a second concentration of dopant that is lower than the first concentration of dopant into the semiconductor to form a first source region and a second drain region, wherein the second drain region overlaps the first drain region and extends laterally beyond the first drain region under the gate;
• and
• implanting and diffusing a third concentration of dopant that is higher than the first concentration of dopant into the first source region and the first drain region to a second depth that is less than the first depth to form a second source region and a third drain region.

A high voltage MOS transistor comprising:

• a gate;
• a source;
• a body;
• and
• a drain comprising:
• means for providing a first doping concentration in a first portion of the drain to decrease resistance in the drain,
• means for providing a second doping concentration in a second portion of the drain extending below the first portion to increase a breakdown voltage between the drain and the body, and
• means for providing a third doping concentration in a third portion of the drain between the gate and the first portion of the drain to increase the breakdown voltage.

An integrated circuit having a high voltage MOS transistor, the high voltage MOS transistor comprising:

• a body in a region of semiconductor;
• a gate above the body;
• and
• a drain and a source formed in the region of semiconductor, wherein the drain comprises:
• a first region that has a first concentration of dopant and a first radius of curvature,
• a second region extending below the first region that has a second concentration of dopant that is less than the first concentration of dopant and a second radius of curvature greater than the first radius of curvature, wherein the second region of the drain is spaced away from the gate, and
• a third region extending from the second region to the body underneath the gate that has a third concentration of dopant that is less than the second concentration of dopant.

A method for making an integrated circuit with a high voltage MOS transistor that includes a source and a gate, the method comprising:

• implanting and diffusing a first concentration of dopant into a region of semiconductor to a first depth to form a first drain region that has a first radius of curvature, wherein the first drain region is spaced away from the gate;
• implanting and diffusing a second concentration of dopant that is lower than the first concentration of dopant into the region of semiconductor to form a second drain region that overlaps the first drain region and extends beyond the first drain region to under the gate of the transistor;
• and
• implanting and diffusing a third concentration of dopant that is higher than the first concentration of dopant into the first drain region to a second depth less than the first depth to form a third drain region, wherein the third drain region has a second radius of curvature less than the first radius of curvature.

A method for making an integrated circuit with a high voltage MOS transistor that includes a source and a gate, the method comprising:

• implanting and diffusing a first concentration of dopant into a region of semiconductor to a first depth to form a first drain region that has a first radius of curvature, wherein the first drain region is spaced away from the gate and the ratio of the first depth to a lateral distance between the gate and the first drain region is between 1.5 and 1.8;
• implanting and diffusing a second concentration of dopant that is lower than the first concentration of dopant into the region of semiconductor to form a second drain region that overlaps the first drain region and extends beyond the first drain region to under the gate of the transistor;
• and
• implanting and diffusing a third concentration of dopant that is higher than the first concentration of dopant into the first drain region to a second depth less than the first depth to form a third drain region, wherein the third drain region has a second radius of curvature less than the first radius of curvature.

An integrated circuit having a high voltage PMOS transistor, the high voltage PMOS transistor comprising:

• a N-type body in a region of semiconductor;
• a gate above the N-type body;
• and
• a P-type drain and a P-type source formed in the region of semiconductor, wherein the P-type drain comprises:
• a first region that has a first concentration of P-type dopant,
• a second region extending below the first region that has a second concentration of P-type dopant that is less than the first concentration of P-type dopant, and
• a third region extending from the second region to under the gate that has a third concentration of P-type dopant that is less than the second concentration of P-type dopant.

An integrated circuit having a high voltage PMOS transistor, the high voltage PMOS transistor comprising:

• an N-type body in a region of semiconductor;
• a gate above the N-type body;
• and
• a P-type drain and a P-type source formed in the region of semiconductor, wherein the drain comprises:
• a first drain region that has a first concentration of dopant, a first depth, and a first radius of curvature,
• a second drain region that has a second concentration of dopant that is less than the first concentration of dopant, a second depth greater than the first depth, and a second radius of curvature greater than the first radius of curvature, and
• a third drain region extending from the second region to the gate that has a third concentration of dopant that is less than the second concentration of dopant, and a third radius of curvature that is less than the second radius of curvature.

An integrated circuit having a high voltage PMOS transistor, the high voltage PMOS transistor comprising:

• an N-type body in a region of semiconductor;
• a gate above the N-type body;
• and
• a P-type drain and a P-type source formed in the region of semiconductor, wherein the drain comprises:
• a first drain region that has a first concentration of dopant and a first radius of curvature,
• a second drain region extending below the first region that has a second concentration of dopant that is less than the first concentration of dopant and a second radius of curvature greater than the first radius of curvature, wherein the second region of the drain is spaced away from the gate, and
• a third drain region extending from the second region to the body underneath the gate that has a third concentration of dopant that is less than the second concentration of dopant.