Use of dilute steam ambient for improvement of flash devices
AssigneeMicron Technology, Inc.
InventorsRonald A. Weimer, Don C. Powell, John T. Moore, Jeff A. McKee
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AssigneeMicron Technology, Inc.
InventorsRonald A. Weimer, Don C. Powell, John T. Moore, Jeff A. McKee
Estimating the term…
The present invention provides a flash memory integrated circuit and a method for fabricating the same. The method includes etching a gate stack that includes an initial oxide layer directly in contact with a silicon layer, defining an oxide-silicon interface therebetween. By exposing the etched gate stack to elevated temperatures and a dilute steam ambient, additional oxide material is formed substantially uniformly along the oxide-silicon interface. Polysilicon grain boundaries at the interface are thereby passivated after etching. In the preferred embodiment, the interface is formed between a tunnel oxide and a floating gate, and passivating the grain boundaries reduces erase variability due to enhanced charge transfer along grain boundaries. At the same time, oxide in an upper storage dielectric layer (oxide-nitride-oxide or ONO) is enhanced in the dilute steam oxidation. Thermal budget can be radically conserved by growing thin oxide layers on either side of a nitride layer prior to etching, and enhancing the oxide layers by dilute steam oxidation through the exposed sidewall after etching. The thin oxide layers, like the initial tunnel oxide, serve as diffusion paths to enhance uniform distribution of OH species across the buried interfaces being oxidized.
An integrated circuit comprising a transistor comprising a polysilicon layer directly in contact with an oxide layer and having an oxide-polysilicon interface therebetween, the polysilicon layer having oxide bonds along its grain boundaries at the oxide-polysilicon interface.
The integrated circuit of claim 2, wherein the polysilicon layer comprises a floating gate in a flash memory device.
A flash memory device comprising a plurality of transistors, each transistor comprising a floating gate layer directly in contact with a tunnel dielectric layer, thereby forming an electrode-dielectric interface, the floating gate layer having oxidized grain boundaries at the electrode-dielectric interface.
Dependencies are inferred from the claim text.