High-efficiency error detection and/or correction code
AssigneeSTMicroelectronics S.r.l.
InventorLaurent Murillo
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Abstract
A method for determining r error detection bits of a word of m bits to be coded, including the step of calculating the product of a vector with m components representative of said word of m bits to be coded and of a parity check matrix. The parity check matrix includes a pattern matrix that may be repeated in said parity check matrix, and said pattern being chosen so that a sum modulo 2 of any two columns of said sub-matrix does not give as a result another column of said sub-matrix. Another method determines a syndrome using r error detection bits determined by the above method.
Claims11
In a computer system, a method for determining r error detection bits of a word of m bits to be coded, comprising the step of calculating the product of a vector with m components representative of said word of m bits to be coded and of a parity check matrix, wherein the parity check matrix includes a pattern matrix that is different from the identity matrix and includes a plurality of columns, wherein said pattern matrix is chosen so that each column of said pattern matrix is different from another column of said pattern matrix and a sum modulo 2 of any two columns of said pattern matrix does not give as a result another column of said pattern matrix.
Dependencies are inferred from the claim text.