System for integrating a toroidal inductor in a semiconductor device
AssigneeTexas Instruments Incorporated
InventorsKenneth D. Brennan, Douglas A. Prinslow, David B. Aldrich
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Abstract
An inductor integrated in a semiconductor device is disclosed, comprising a first and second lower electrical trace, an upper electrical trace, aligned at a first end with a first end of the first lower electrical trace and at a second end with a second end of the second lower electrical trace, a first via intercoupling the first end of the upper electrical trace with the first end of the first lower electrical trace, and a second via intercoupling the second end of the upper electrical trace with the second end of the second lower electrical trace.
Claims20
An inductor integrated within a semiconductor circuit comprising:
- a first and second lower electrical trace;
- an upper electrical trace, aligned at a first end with a first end of the first lower electrical trace and at a second end with a second end of the second lower electrical trace;
- a first via intercoupling the first end of the upper electrical trace with the first end of the first lower electrical trace;
- and
- a second via intercoupling the second end of the upper electrical trace with the second end of the second lower electrical trace.
A toroidal inductor formed within a semiconductor process comprising:
- a first lower electrical trace, having first and second ends;
- a second lower electrical trace, having first and second ends;
- a third lower electrical trace, having first and second ends;
- a first upper electrical trace, having a first end aligned with the first end of the first lower electrical trace and a second end aligned with the second end of the second lower electrical trace;
- a second upper electrical trace, having a first end aligned with the first end of the second lower electrical trace and a second end aligned with the second end of the third lower electrical trace;
- a first via intercoupling the first end of the first upper electrical trace with the first end of the first lower electrical trace;
- a second via intercoupling the second end of the first upper electrical trace with the second end of the second lower electrical trace;
- a third via intercoupling the first end of the second upper electrical trace with the first end of the second lower electrical trace;
- and
- a fourth via intercoupling the second end of the second upper electrical trace with the second end of the third lower electrical trace.
A method of providing an integrated tuned circuit component comprising the steps of:
- providing a first and second lower electrical trace;
- providing an upper electrical trace, aligned at a first end with a first end of the first lower electrical trace and at a second end with a second end of the second lower electrical trace;
- providing a first via intercoupling the first end of the upper electrical trace with the first end of the first lower electrical trace;
- and
- providing a second via intercoupling the second end of the upper electrical trace with the second end of the second lower electrical trace.
Dependencies are inferred from the claim text.