Protection circuit provided in semiconductor circuit
AssigneeKabushiki Kaisha Toshiba
InventorsAkira Takiba, Masanori Kinugasa, Yoshimitsu Itoh, Masaru Mizuta
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AssigneeKabushiki Kaisha Toshiba
InventorsAkira Takiba, Masanori Kinugasa, Yoshimitsu Itoh, Masaru Mizuta
Estimating the term…
A power supply terminal is supplied with a power supply potential. A reference terminal is supplied with a reference potential. First and second p-channel MOS transistor, and first and second n-channel MOS transistor each has a gate, a source, a drain, and a back gate. The gate, source and back gate of the first pMOS transistor, the back gate of the second pMOS transistor, and the gate and drain of the second nMOS transistor are connected to the power supply terminal. The source of the second pMOS transistor is connected to the drain of the first pMOS transistor. The gate and drain of the second pMOS transistor, the gate, source and back gate of the first nMOS transistor, and the back gate of the second nMOS transistor are connected to the reference terminal. The source of the second nMOS transistor is connected to the drain of the first nMOS transistor.
A protection circuit comprising:
A protection circuit comprising:
A protection circuit comprising:
A protection circuit comprising:
A protection circuit comprising:
Dependencies are inferred from the claim text.