Method of forming a mos transistor of a semiconductor

Abstract

The present invention provides a method of forming a MOS transistor on a substrate of a semiconductor wafer. The method comprises forming a rectangular-shaped gate on the substrate, forming a spacer at each of two opposite sides of the gate on the substrate, performing a first ion implantation process to form a source and a drain at predetermined positions of the substrate beside the two spacers, performing a first thermal annealing process on the semiconductor wafer, removing the spacers from the two sides of the gate, performing a second ion implantation process on the substrate to form a conducting layer below each of the spacers wherein one conducting layer is electrically connected with the source and another conducting layer is electrically connected with the drain, and performing a second thermal annealing process on the semiconductor wafer for activating implants of the second ion implantation process in the two conducting layers.

Dependencies are inferred from the claim text.