Semiconductor memory
AssigneeKabushiki Kaisha Toshiba
InventorHiroyuki Ohtake
Life of this patent
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Abstract
When a write & auto precharge command is input into a chip, signals CPSRX and AUTPL are at “H”. After finishing a column operation, the level of the signal CPSRX shift to “L”. When CPSRX=“L” and AUTPL=“H”, if a signal CSLCK is at “H”, an auto precharge enable signal AUTPE is at “H”. The signal AUTPE is at “H” when the signal CSLCK is at “H”, and does not depend upon the leading edge of an external clock VCLK. Since auto precharge is executed from the time a column select line CSL is activated, the time the potential of a selected word line is shifted to a non-selection level can be kept constant irrespective of the frequency of the external clock.
Claims11
A semiconductor memory comprising:
- a generator for generating a pulse signal, used to operate a column decoder, on the basis of a clock signal and a first control signal;
- a precharge decoder for outputting a second control signal, used to control an operation of a row decoder, on the basis of the first control signal and the pulse signal;
- and
- a delay circuit operable independent of the clock signal for delaying the second control signal by a predetermined time period.
Dependencies are inferred from the claim text.