Noise-resistant output stage circuit

Abstract

A noise-resistant output stage circuit with inverse-feedback control comprising two NMOS transistors. A first NMOS transistor is coupled to a first high voltage via the drain, and coupled to a first input signal via the gate. A second MOS transistor is coupled to a source of the first MOS transistor via the drain, and performing an output terminal of the output stage circuit, therewith the gate of the second MOS transistor receiving a second input signal; an alternative of the first input signal or the second input signal presents a second high voltage and the other presents a grounding, wherein the second high voltage exceeds the first high voltage. Preferably, the second high voltage is greater than twice the first high voltage. In operation, an alternative of the first NMOS transistor or the second NMOS transistor operates within a linear region.

Dependencies are inferred from the claim text.