Vacuum package fabrication of integrated circuit components

A method for vacuum packaging integrated circuit devices, comprising:

• forming on a device wafer a plurality of integrated circuit devices;
• forming a plurality of first sealing rings, each of the plurality of first sealing rings surrounding one or more integrated circuit devices, each first sealing ring positioned between the perimeter of the one or more integrated circuit device and one or more bonding pads coupled to each of the one or more integrated circuit devices;
• forming on a lid wafer a plurality of second sealing rings corresponding in number and location to the plurality of first sealing rings;
• depositing a solder layer on either each of the plurality of first sealing rings or each of the plurality of second sealing rings;
• aligning the device wafer and the lid wafer such that each of the plurality of first sealing rings aligns with the corresponding one of the plurality of second sealing rings leaving a gap between the device wafer and the lid wafer;
• and
• mating the device wafer with the lid wafer in a vacuum environment to form a plurality of vacuum packages, each vacuum package enclosing one or more of the plurality of integrated circuit devices.

A method for vacuum packaging integrated circuit devices, comprising:

• forming on a device wafer a plurality of integrated circuit devices;
• forming a plurality of first sealing rings, each of the plurality of first sealing rings surrounding one or more integrated circuit devices, each first sealing ring positioned between the perimeter of the one or more integrated circuit device and one or more bonding pads coupled to each of the one or more integrated circuit devices;
• forming on a lid wafer a plurality of second sealing rings corresponding in number and location to the plurality of first sealing rings;
• forming a solder layer on either each of the plurality of first sealing rings or each of the plurality of second sealing rings;
• aligning the device wafer and the lid wafer such that each of the plurality of first sealing rings aligns with the corresponding one of the plurality of second sealing rings leaving a gap between the device wafer and the lid wafer;
• and
• mating the device wafer with the lid wafer in a vacuum environment to form a plurality of vacuum packages, each vacuum package enclosing one or more of the plurality of integrated circuit devices.

A vacuum package containing one or more integrated circuit devices, comprising:

• one or more integrated circuit devices formed on device wafer, said devices having one or more associated bonding pads;
• a sealing ring formed on the device wafer between the perimeter of the one or more integrated circuit devices and the one or more bonding pads coupled to the one or more integrated circuit devices;
• and
• a vacuum package lid sealed to the sealing ring, the vacuum package lid providing a vacuum cell for the one or more integrated circuit devices.