Coplanar gate-source-drain Poly-TFT and method for fabricating the same

A coplanar gate-source-drain Poly-TFT comprising:

• a metal layer formed upon a transparent substrate, said metal layer including a metal wire of gate, a metal wire of drain and a metal wire of source, and forming the respective gaps in between said metal wire of source and said metal wire of gate as well as in between said metal wire of drain and said metal wire of gate;
• an insulating layer for covering said metal wire of gate;
• and
• a layer of polycrystalline semiconductor formed across and upon said insulating layer, that both ends of said layer of polycrystalline semiconductor are in contact with said metal wire of drain and said metal wire of source respectively, and the areas in contact with said metal wire of drain and said metal wire of source are doped with impurity ions of high concentration, and the areas with respect above said gaps are doped with impurity ions of low concentration.

A fabricating method of a coplanar gate-source-drain Poly-TFT comprising the steps:

• forming a metal layer upon a transparent substrate that said metal layer includes a metal wire of source, a metal wire of drain and a metal wire of gate, and includes the respective gaps in between said metal wire of source and said metal wire of gate as well as in between said metal wire of drain and said metal wire of gate;
• applying an insulating layer to cover said metal wire of gate;
• forming a layer of amorphous semiconductor across and upon said insulating layer that both ends of said layer of amorphous semiconductor are in contact with said metal wire of source and said metal wire of drain respectively;
• doping the impurity ions of high concentration into the areas on said layer of amorphous semiconductor where are in contact with said metal wire of source and said metal wire of drain;
• and
• crystallizing and activating said layer of amorphous semiconductor.