Semiconductor device
OwnerShigeru Nakajima, Kenji Otobe +1inventors
InventorsShigeru Nakajima, Kenji Otobe, Ken Nakata
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OwnerShigeru Nakajima, Kenji Otobe +1inventors
InventorsShigeru Nakajima, Kenji Otobe, Ken Nakata
Estimating the term…
The present invention relates to a power field-effect transistor capable of reducing third-order distortions. The power field-effect transistor 10a comprises a pulse-doped layer 16; a control electrode 18; a cap layer 20; ohmic electrodes 24a, 24b; heavily-doped semiconductor regions 22a, 22b; and a doped semiconductor region 26. The cap layer 20 is made of III-V compound semiconductor provided between the pulse-doped layer 16 and the control electrode 18. The heavily-doped semiconductor region 22a electrically connects the electrode 24a and the pulse-doped layer 16 to each other. The heavily-doped semiconductor region 22b electrically connects the electrode 24b and the pulse-doped layer 16 to each other. The doped semiconductor region 16 is provided in the cap layer 20 so as to electrically connect the heavily-doped semiconductor region 22a and the pulse-doped layer 16 to each other. The doped semiconductor region 26 has a carrier concentration lower than that of the heavily-doped semiconductor region 22a and has a conductive type identical to that of the pulse-doped layer 16.
A semiconductor device comprising:
Dependencies are inferred from the claim text.