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US 2001/0055223 A1Published application
Nonvolatile semiconductor memory
AssigneeKabushiki Kaisha Toshiba
InventorHiroshi Iwahashi
Life of this patent
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Abstract
A nonvolatile semiconductor memory is disclosed. This nonvolatile semiconductor memory includes a memory cell string containing a selection transistor and at least one cell transistor which is connected to the selection transistor and has a floating gate. This memory further includes a bias circuit for, when the selection transistor is unselected, supplying a potential different from the ground potential to the gate of the cell transistor connected to the unselected selection transistor.
Claims20
A semiconductor memory device comprising:
- a memory cell array in which memory cell strings each containing a selection transistor and at least one cell transistor which is connected to the selection transistor and has a charge accumulation layer are arranged in a matrix;
- and
- a potential supply circuit configured, at least in a read operation, to supply a potential different from a ground potential to a gate of at least one of the at least one cell transistor when the selection transistor is unselected.
A semiconductor memory device comprising:
- a memory cell array in which cell transistors each having a charge accumulation layer are arranged in a matrix;
- and
- a potential supply circuit configured, at least in a read operation, to supply a potential different from a ground potential to gate of the cell transistors when the memory cell array is unselected.
Dependencies are inferred from the claim text.