A non-volatile semiconductor memory device comprising:
- a plurality of non-volatile memory cells each of which has a threshold voltage representing data of at least two bits, wherein threshold voltages of the plurality of non-volatile memory cells are shiftable among at least three threshold levels which indicate mutually different programming states and which also differ from a threshold level indicating an erase state;
- parameter generating circuitry generating a first programming reference parameter, a first read reference parameter, a second programming reference parameter, a second read reference parameter, a third programming reference parameter and a third read reference parameter;
- and
- sensing/program-verifying circuitry receiving a parameter which represents threshold voltage of one non-volatile memory cell, the first programming reference parameter, the first read reference parameter, the second programming reference parameter, the second read reference parameter, the third programming reference parameter and the third read reference parameter;
- wherein the first read reference parameter is allocated between a value corresponding to the threshold level indicating the erase state and the first programming reference parameter, the second read reference parameter is allocated between the first programming reference parameter and the second programming reference parameter, and the third read reference parameter is allocated between the second programming reference parameter and the third programming reference parameter,
- wherein the sensing/program-verifying circuitry generates data of at least two bits represented by the one non-volatile memory cell threshold voltage, verifies whether the one non-volatile memory cell threshold voltage is shifted to the threshold level indicating a selected one of the programming states, and programs the one non-volatile memory cell until it is verified that the one non-volatile memory cell threshold voltage has been shifted to that threshold level,
- wherein the first programming reference parameter is used for verifying whether non-volatile memory cell threshold voltages are shifted to a first threshold level of the three threshold levels, the first read reference parameter is used for detecting whether non-volatile memory cell threshold voltages are near to the first threshold level or to the threshold level indicating the erase state, and one of the first programming reference parameter and the first read reference parameter is shifted from and dependent upon the other,
- wherein the second programming reference parameter is used for verifying whether non-volatile memory cell threshold voltages are shifted to a second threshold level of the three threshold levels, the second read reference parameter is used for detecting whether non-volatile memory cell threshold voltages are near to the second threshold level or to the first threshold level, and one of the second programming reference parameter and the second read reference parameter is shifted from and dependent upon the other, and
- wherein the third programming reference parameter is used for verifying whether non-volatile memory cell threshold voltages are shifted to a third threshold level of the three threshold levels, the third read reference parameter is used for detecting whether non-volatile memory cell threshold voltages are near to the third threshold level or to the second threshold level, and one of the third programming reference parameter and the third read reference parameter is shifted from and dependent upon the other.