US 2001/0055022 A1 · Serial access memory and data write/read method

Abstract

An object is to provide a serial access memory and a data write/read method applicable thereto and capable of reducing the test time of the serial access memory. After transferring the data stored in the memory cells MC11 to MCm1 connected with a word line WL1 to the read registers Rreg-1 to Rreg-m all at once, the data stored in the memory cells MC12 to MCm2 connected with a word line WL2 is transferred to the write registers Wreg-1 to Wreg-m all at once. The data stored in the read register is transmitted to an output means 123 through read data buses RD, /RD. The data stored in the write register is transmitted to the output means 123 through write data buses WD,/WD, an input/output means 122, and the second read data buses RD2, /RD2. The output means 123 compares the data transmitted from the read data buses RD, /RD with the data transmitted from second data buses RD2, /RD2.

Claims13

Dependent claims

A data write/read method applicable to a serial access memory of the class wherein there are provided:

a plurality of memory cells arranged at each of intersections made by a plurality of word lines and a plurality of bit lines,
the first register having a capacity capable of storing one word data stored in said plural memory cells connected with each of said plural word lines, and
the second register having a capacity capable of storing one word data stored in said plural memory cells connected with each of said plural word lines,
said data write/read method comprising:
the first write step of storing the first input serial data of one word in said first register;
and
the second write step of transferring the one word data stored in said first register in said first write step, to said plural memory cells connected with each of a plurality of first selected word lines selected from said plural word lines.

4 more elements

Dependencies are inferred from the claim text.

Serial access memory and data write/read method

Life of this patent

Serial access memory and data write/read method

Life of this patent

Abstract

Claims13