Atm cell switching system

A switching system comprising a switch unit including a plurality of switch unit input ports and switch unit output ports having a first transmission rate, a plurality of input lines and a plurality of output lines:

• wherein at least one conversion means is interposed between at least one of the output lines having a second transmission rate different from the first transmission rate and at least one of the switch unit output ports for converting a cell train having the first transmission rate to a cell train having the second transmission train;
• said switch unit includes:
• multiplexer means for multiplexing and outputting as a single cell train a plurality of cell trains inputted from the switch unit input ports;
• a share buffer memory for temporarily storing the cell trains outputted sequentially from the multiplexer means;
• demultiplxer means for periodically distributing the cells read from the shared buffer memory among the switch unit output ports;
• and
• a buffer memory control circuit for controlling the read and write operations of cells with the shared buffer memory;
• said buffer memory control circuit includes:
• control table means for outputting an identifier for an output line for outputting cells read from the shared buffer memory in accordance with the timing of cell output to the switch unit output ports;
• write control means for writing cell trains outputted from the multiplexer means into the buffer memory in such a manner that each cell forms a queue chain for each output line to be outputted on;
• and
• read control means for reading cells from a queue chain in the shared buffer memory in accordance with an output line identifier read sequentially from the control table means.