Dram cell with active area reclaim
OwnerRama Divakaruni, William H. Ma +1inventors
InventorsRAMA DIVAKARUNI, WILLIAM H. MA, BYEONGJU PARK
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Abstract
A dynamic random-access memory (DRAM) cell comprising a trench capacitor and an access transistor and a process of manufacturing the cell. The trench capacitor is formed in a trench and is positioned at the bottom of the trench. The access transistor has an active area formed in the trench adjacent the trench capacitor and adjacent the top surface of the substrate. The active area provides an electrical connection with the trench capacitor. The DRAM cell design reclaims the active area above the trench capacitor.
Claims20
A dynamic random-access memory (DRAM) cell comprising:
- a substrate having a top surface and a trench with a trench bottom in the substrate, the trench extending from the top surface of the substrate to the trench bottom;
- a trench capacitor positioned in the trench at the bottom of the trench;
- and
- an access transistor having an active area formed in the trench adjacent the trench capacitor and adjacent the top surface of the substrate, the active area being in electrical connection with the trench capacitor.
A process for manufacturing a dynamic random-access memory (DRAM) cell, the process comprising the steps of:
- (a) forming a trench capacitor of the cell, the trench capacitor comprising:
- a trench extending in a substrate from a substrate top surface, the trench having a trench side wall and a trench bottom,
- a trench conductor filled in the trench,
- a node dielectric surrounding the trench side wall, and
- an oxide collar adjacent to the node dielectric at an upper portion of the trench side wall;
- (b) forming a mask on the substrate top surface, the mask covering a portion of the trench capacitor and leaving a portion of the trench capacitor exposed;
- (c) etching the exposed portion of the trench conductor, the node dielectric, and the oxide collar to a point intermediate the substrate top surface and the trench bottom such that a portion of the substrate adjacent the trench side wall is exposed;
- (d) removing the mask and etching the trench conductor to a second point intermediate the substrate top surface and the trench bottom;
- (e) selectively growing a polycrystalline silicon layer from the trench conductor and selectively growing an epitaxial silicon layer from the exposed substrate portion;
- and
- (f) forming the access transistor of the cell by doping the epitaxial silicon layer to form one of a source and a drain of the transistor and creating a gate and the other of the source and the drain adjacent thereto.
A dynamic random-access memory structure formed by a process comprising the steps of:
- (a) forming a trench capacitor, the trench capacitor comprising:
- a trench extending in a substrate from a substrate top surface, the trench having a trench side wall and a trench bottom,
- a trench conductor filled in the trench,
- a node dielectric surrounding the trench side wall, and
- an oxide collar adjacent the node dielectric at an upper portion of the trench side wall;
- (b) forming a mask on the substrate top surface, the mask covering a portion of the trench capacitor and leaving a portion of the trench capacitor exposed;
- (c) etching the exposed portion of the trench conductor, the node dielectric, and the oxide collar to a point intermediate the substrate top surface and the trench bottom such that a portion of the substrate adjacent the trench side wall is exposed;
- (d) removing the mask and etching the trench conductor to a second point intermediate the substrate top surface and trench bottom;
- (e) selectively growing a polycrystalline silicon layer from the trench conductor and selectively growing an epitaxial silicon layer from the exposed substrate portion;
- and
- (f) forming an access transistor by doping the epitaxial silicon layer to form one of a source and a drain of the transistor and creating a gate and the other of the source and the drain adjacent thereto.
Dependencies are inferred from the claim text.