US 2001/0042228 A1 · Memory access system

Abstract

A system for accessing a memory including memorization subsystems, wherein the words to be stored are split up so that several memorization subsystems are used to store one word and its associated Block Error Code (BEC) bits includes logical insulation means and electrical insulation means that are associated to each memorization subsystem. When a memorization subsystem needs to be replaced, e.g. if it is failing, the memory controller insulates this memorization subsystem, the data stored therein are retrieved thanks to the data stored in the other memorization subsystems and thanks to BEC read path function. Thus, when a memorization subsystem is insulated, the computer user can replace this memorization subsystem without losing data and perturbing the computer. After a memorization subsystem has been replaced, its content may be restored using BEC.

Claims20

Dependent claims

A system for accessing a memory comprising a plurality of memorization subsystems, independent and removable, said memory being adapted to store words made of n unitary elements, said system comprising:

encoding means to encode each of the n unitary element words to be stored into the memory into a n+m unitary elements word, where the m unitary elements are error correction unitary elements;
word input means for applying each of the n+m elementary elements of a word to a different memorization subsystem of said plurality of memorization subsystems;
word output means for accessing each of the n+m elementary elements of a word from a different memorization subsystem of said plurality of memorization subsystems;
decoding means responsive to each n+m elementary elements word for producing an error free n unitary elements word;
and
logical insulation means and electrical insulation means associated to each memorization subsystem of said plurality of memorization subsystems, capable of insulate logically and electrically each of said plurality of memorization subsystems.

3 more elements

Dependencies are inferred from the claim text.

Memory access system

Life of this patent

Memory access system

Life of this patent

Abstract

Claims20