Method of manufacturing non-volatile semiconductor memory device storing charge in gate insulating layer therein
AssigneeSony Corporation
InventorAKIHIRO NAKAMURA
Life of this patent
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Abstract
A method of manufacturing a non-volatile semiconductor memory device having a gate insulating layer composed of a first silicon oxide layer, a silicon nitride layer, and a second silicon oxide layer and a gate electrode, comprising the steps of forming the gate insulating layer on a semiconductor substrate, introducing an impurity into a channel region of the semiconductor substrate after forming the gate insulating layer, or forming a gate electrode on the gate insulating layer.
Claims12
A method of manufacturing a non-volatile semiconductor memory device, including the steps of forming a gate insulating layer on a semiconductor substrate, forming a gate electrode on the gate insulating layer and introducing impurities into a channel region in a surface area of the semiconductor substrate beneath the gate insulating layer, characterized in that
- in the step of forming the gate insulating layer, a first silicon oxide layer, a silicon nitride layer and a second silicon oxide layer are formed and stacked in that order,
- after the step of forming the gate insulating layer, the step of introducing impurities is carried out.
A method of manufacturing a non-volatile semiconductor memory device, including the steps of forming a gate insulating layer on a semiconductor substrate, forming a polycrystalline silicon layer on the gate insulating layer and introducing impurities into a channel region in a surface area of the semiconductor substrate beneath the gate insulating layer, characterized in that
- in the step of forming the gate insulating layer, a first silicon oxide layer, a silicon nitride layer and a second silicon oxide layer are formed and stacked in that order,
- after the step of forming the polycrystalline silicon layer, the step of introducing impuritis is carried out.
A method of manufacturing a non-volatile semiconductor memory device having a gate insulating layer including a first silicon oxide layer, a silicon nitride layer and a second silicon oxide layer, and a gate electrode, comprising the steps of
- forming the gate insulating layer on a semiconductor substrate,
- introducing an impurity into a channel region of the semiconductor substrate after forming the gate insulating layer, and
- forming a gate electrode on the gate insulating layer.
A method according to 7, wherein said second silicon oxide layer is formed by oxidizing the silicon nitride layer.
A method of manufacturing a non-volatile semiconductor memory device having a gate insulating layer including a first silicon oxide layer, a silicon nitride layer and a second silicon oxide layer, and a gate electrode, comprising the steps of
- forming the gate insulating layer on a semiconductor substrate,
- forming a polycrystalline silicon layer composed of the gate electrode on the gate insulating layer, and
- introducing an impurity into a channel region of the semiconductor substrate after forming the polycrystalline silicon layer.
Dependencies are inferred from the claim text.