Semiconductor integrated circuit with an insulation structure having reduced permittivity

A method of fabricating a semiconductor integrated circuit having an insulating structure with reduced capacitance comprising the steps of:

• forming a first insulating layer overlying a semiconductor substrate;
• forming a plurality of conductive paths overlying said first insulating layer wherein each of said conductive paths has a first thickness;
• forming a second insulating layer overlying said first insulating layer and at least a major portion of each of said conductive paths;
• forming a disposable layer overlying said second insulating layer at least adjacent said conductive paths, wherein said disposable layer has a second thickness no greater than said first thickness;
• forming a third insulating layer overlying said semiconductor substrate wherein said third insulating layer is coupled to each of said conductive paths and said disposable layer;
• forming a plurality of air gap ports in said third insulating layer wherein said plurality of air gap openings are disposed between adjacent conductive paths;
• and
• removing said disposable layer wherein an air gap is formed.