Method and system for improving the dimensional accuracy of core source/drain marks
OwnerMichael K. Templeton, Hao Fang +1inventors
InventorsMichael K. Templeton, Hao Fang, Mark S. Chang
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OwnerMichael K. Templeton, Hao Fang +1inventors
InventorsMichael K. Templeton, Hao Fang, Mark S. Chang
Estimating the term…
A method and system for providing a plurality of lines in a core of a memory device from a layer of material is disclosed. The method and system include utilizing a mask to print a physical mask for the plurality of lines. The mask includes a plurality of polygons for each of the plurality of lines. The plurality of polygons are for printing a pattern for the physical mask, the pattern of the physical mask covering a first portion the layer of material. In one aspect, the plurality of polygons includes a first polygon having at least one end and at least one hammerhead structure at the at least one end. In another aspect, the plurality of polygons includes a first polygon having at least one end and at least one serit structure at the at least one end. The method and system also include removing a second portion of the layer of material exposed by the pattern of the physical mask to form the plurality of lines. Thus, the plurality of lines has reduced foreshortening and reduced end-rounding.
A method for providing a plurality of lines in a core of a memory device from a layer of material, the method comprising the steps of:
A semiconductor memory device comprising:
Dependencies are inferred from the claim text.