Method for making a pedestal fuse
AssigneeInternational Business Machines Corporation
InventorsDennis P. Bouldin, Timothy H. Daubenspeck, William T. Motsiff
Life of this patent
Estimating the term…
Loading patent…
AssigneeInternational Business Machines Corporation
InventorsDennis P. Bouldin, Timothy H. Daubenspeck, William T. Motsiff
Estimating the term…
A structure and method of fabricating a metallization fuse line is disclosed. The structure can be formed on a semiconductor substrate, including an insulator structure formed on the substrate, the insulator structure having an upper layer and a lower layer, the upper being thinner than the lower, the insulator structure having a plurality of openings of varying depth, and a metal structure inlaid in the insulator structure, the metal structure having first and second portions and a third portion there between that is substantially more resistive than the first and second portions, the third portion having a thickness substantially- similar to the thickness of the upper layer of the insulator structure. The upper layer includes a nitride, the lower layer includes an oxide and the metal structure includes copper. The fuse structure allows formation of “easy to laser delete” thin metal fuses within segments of thick metal lines. This applies to wiring layers formed from “high” melting temperature metals and those defined using a damascene process. For example, copper back end of line (Cu BEOL) damascene wiring, as used with CMOS can use the invention. The technique achieves high yield fusing for technologies that use thick wiring layers. The structure separates the thickness of the fuse segment from the remainder of the wiring line. The structure can be used with very thick, e.g., >1.2μ wiring and very thin, e.g., <0.5μ fuses.
A method for forming a thin pedestal fuse segment in a thick last metal (LM) wiring line, comprising the steps of:
A method for forming a thin pedestal fuse segment in a last metal (LM) wiring line, comprising the steps of:
A metallization structure formed on a semiconductor substrate, comprising:
Dependencies are inferred from the claim text.